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Product Specification
Part Name: OEL Display Module Part ID: UG-2864HSWEG01 Doc No.: SAS1-9046-B
Customer:
Approved by
From: Univision Technology Inc.
Approved by
Univision Technology Inc.
8, Kebei RD 2, Science Park, Chu-Nan, Taiwan 350, R.O.C.
Notes: 1. Please contact Univision Technology Inc. before assigning your product based on this module specification 2. The information contained herein is presented merely to indicate the characteristics and performance of our products. No responsibility is assumed by Univision Technology Inc. for any intellectual property claims or other problems that may result from application based on the module described herein.
Univision Technology Inc.
Revised History
Part Number UG-2864HSWEG01 Revision A Revision Content New Page 5~6 Section 1.6
Update Application Circuit
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Revised on February 17, 2009
Page 7 Page 8 UG-2864HSWEG01 B
Section 2 Section 3.1 & 3.2 June 5, 2009
Update Absolute Maximum Ratings Modify Brightness VCC Supplied Externally (Min/Typ) 80/100 100/120 VCC Generated by Internal DC/DC (Min/Typ) 50/60 70/90 Update DC Characteristics
Page 15
Section 4.4
Update Initialization
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Notice:
No part of this material may be reproduces or duplicated in any form or by any means without the written permission of Univision Technology Inc. Univision Technology Inc. reserves the right to make changes to this material without notice. Univision Technology Inc. does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of Foreign Exchange and Foreign Trade Law of Taiwan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. (c) Univision Technology Inc. 2009, All rights reserved. All other product names mentioned herein are trademarks and/or registered trademarks of their respective companies.
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Revision History ................................................................................................... i Notice ................................................................................................................... ii Contents .............................................................................................................. iii 1. Basic Specifications .................................................................................. 1~6
1.1 1.2 1.3 1.4 1.5 1.6 Display Specifications .................................................................................................1 Mechanical Specifications ...........................................................................................1 Active Area & Pixel Construction ...............................................................................1 Mechanical Drawing....................................................................................................2 Pin Definition...............................................................................................................3 Block Diagram .............................................................................................................5 1.6.1 VCC Supplied Externally ....................................................................................5 1.6.2 VCC Generated by Internal DC/DC Circuit........................................................6
2. Absolute Maximum Ratings .......................................................................... 7 3. Optics & Electrical Characteristics ......................................................... 8~13
3.1 Optics Characteristics ..................................................................................................8 3.2 DC Characteristics .......................................................................................................8 3.3 AC Characteristics .......................................................................................................9 3.3.1 68XX-Series MPU Parallel Interface Timing Characteristics ...........................9 3.3.2 80XX-Series MPU Parallel Interface Timing Characteristics .........................10 3.3.3 Serial Interface Timing Characteristics (4-wire SPI).......................................11 3.3.4 Serial Interface Timing Characteristics (3-wire SPI).......................................12 3.3.5 I2C Interface Timing Characteristics ...............................................................13
4. Functional Specification ....................................................................... 14~15
4.1 Commands .................................................................................................................14 4.2 Power down and Power up Sequence ........................................................................14 4.2.1 Power up Sequence ..........................................................................................14 4.2.2 Power down Sequence .....................................................................................14 4.3 Reset Circuit...............................................................................................................14 4.4 Actual Application Example ......................................................................................15
5. Reliability ...................................................................................................... 16
5.1 Contents of Reliability Tests......................................................................................16 5.2 Lifetime......................................................................................................................16 5.3 Failure Check Standard..............................................................................................16
6. Outgoing Quality Control Specifications .............................................. 17~21
6.1 Environment Required ...............................................................................................17 6.2 Sampling Plan ............................................................................................................17 6.3 Criteria & Acceptable Quality Level .........................................................................17 6.3.1 Cosmetic Check (Display Off) in Non-Active Area ........................................17 6.3.2 Cosmetic Check (Display Off) in Active Area.................................................20
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6.3.3 Pattern Check (Display On) in Active Area.....................................................21
7. Package Specifications ................................................................................ 22 8. Precautions When Using These OEL Display Modules ....................... 23~25
8.1 8.2 8.3 8.4 8.5 Handling Precautions .................................................................................................23 Storage Precautions....................................................................................................24 Designing Precautions ...............................................................................................24 Precautions when disposing of the OEL display modules.........................................25 Other Precautions.......................................................................................................25
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1. Basic Specifications
1.1 Display Specifications 1) 2) 3) Display Mode: Display Color: Drive Duty: Passive Matrix Monochrome (White) 1/64 Duty
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1.2 Mechanical Specifications 1) 2) 3) 4) 5) 6) 7) Outline Drawing: Number of Pixels: Panel Size: Active Area: Pixel Pitch: Pixel Size: Weight: According to the annexed outline drawing 128 x 64 26.70 x 19.26 x 1.45 (mm) 21.744 x 10.864 (mm) 0.17 x 0.17 (mm) 0.154 x 0.154 (mm) 1.54 (g)
1.3 Active Area & Pixel Construction
P0.17x128-0.016=21.744 "A" 0.17 0.154
P0.17x64-0.016=10.864
Segment 127
( Column 1 )
Segment 0
( Column 128 )
0.17 0.154 Common 32
( Row 63 )
Common 0
( Row 64 )
Detail "A" Scale (10:1)
Common 63
( Row 1 )
Common 31
( Row 2 )
1
Remark Original Drawing
Change FPC & Modify Pin Definition
Item A B
Date 20080910 20090120
0.50.5 (1.478) (2.478) 10 P0.17x128-0.016=21.744 "A" (10.55) 5 1.450.1
1.4 Mechanical Drawing
26.70.2 (Panel Size) 26.70.2 (Cap Size) 25.70.5 (Polarizer) 23.744 (V/A) 21.744 (A/A)
(2.1) (1.1) 0.50.5 Remove Tape t=0.15mm Max 8 (20.86) Segment 127
( Column 1 )
Active Area 0.96" 128 x 64 Pixels
Polarizer t=0.2mm (1.6)
Segment 0
( Column 128 )
D0
D2
D4
C2P
C1P
BS0
VSS
BS2
D6
RES#
N.C. (GND)
N.C. (GND)
C2N
C1N
N.C.
VDD
BS1
D1
D3
D5
CS#
D/C#
E/RD#
D7
VCOMH
VLSS
Univision Technology Inc.
4 4.75 6.887
30
R/W# IREF VCC
VBAT
1. Color: White 2. Driver IC: SSD1306 3. FPC Number: UT-0206-P05 B 4. Interface: 8-bit 68XX/80XX Parallel, 3-/4-wire SPI, I2C 5. General Tolerance: 0.30 6. The total thickness (1.55 Max) is without polarizer protective film & remove tape. The actual assembled total thickness with above materials should be 1.80 Max.
10.864 (A/A) 12.864 (V/A) 14.40.5 (Polarizer) 15.50.2 (Cap Size) 19.260.2 (Panel Size) (31.26) P0.17x64-0.016=10.864 Common 32
( Row 63 )
Glue Common 63
( Row 1 )
Common 0
( Row 64 )
Common 31
( Row 2 )
(1.613)
3M #1318B 15x8x0.063mm
Contact Side
Notes:
11 120.3 2-R0.40.05 Contact Side 0.10.03
Customer Approval Signature
Unless Otherwise Specified
B
1
0.17 0.154
20.3
Unit
General Roughness
0.154 0.17
(2.35)
120.2 160.1 (Alignment Mark) P0.70x(30-1)=20.30.05 (W0.400.03) 0.850.1 220.2
Detail "A" Scale (10:1)
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Symbol N.C. (GND) C2P C2N C1P C1N VBAT N.C. VSS VDD BS0 BS1 BS2 CS# RES# D/C# R/W# E/RD# D0 D1 D2 D3 D4 D5 D6 D7 IREF VCOMH VCC VLSS N.C. (GND)
Univision Technology Inc.
mm Title UG-2864HSWEG01 Folding Type OEL Display Module Pixel Number: 128 x 64, Monochrome, COG Package
Drawing Number DMX2864SDGF46
Rev. B Material Soda Lime / Polyimide Tolerance 0.3 Dimension Angle 1 By Date Drawn Humphrey Lin 20090120 E.E. James Wang 20090120 Panel / E. Ivy Lo 20090120 P.M. Cherry Lin 20090120 Scale 1:1 Sheet 1 of 1 Size A3
The drawing contained herein is the exclusive property of Univision. It is not allowed to copy, reproduce and or disclose in any formats without permission of Univision.
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1.5 Pin Definition Pin Number Power Supply Power Supply for Logic 9 8 VDD VSS P P Symbol Type
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Function
This is a voltage supply pin. It must be connected to external source.
Ground of Logic Circuit
This is a ground pin. It acts as a reference for the logic pins. It must be connected to external ground.
Power Supply for OEL Panel 28 VCC P
This is the most positive voltage supply pin of the chip. A stabilization capacitor should be connected between this pin and VSS when the converter is used. It must be connected to external source when the converter is not used.
29 Driver
VLSS
P
Ground of Analog Circuit
This is an analog ground pin. It should be connected to VSS externally.
Current Reference for Brightness Adjustment 26 IREF I
This pin is segment current reference pin. A resistor should be connected between this pin and VSS. Set the current lower than 12.5A.
Voltage Output High Level for COM Signal 27 VCOMH O
This pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and VSS.
DC/DC Converter Power Supply for DC/DC Converter Circuit 6 VBAT P
This is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to VDD when the converter is not used.
4/5 2/3 Interface
C1P / C1N C2P / C2N
I
Positive Terminal of the Flying Inverting Capacitor Negative Terminal of the Flying Boost Capacitor
The charge-pump capacitors are required between the terminals. They must be floated when the converter is not used.
Communicating Protocol Select 10 11 12 BS0 BS1 BS2
These pins are MCU interface selection input. See the following table: BS0 BS1 BS2 I2C 0 1 0 3-wire SPI 1 0 0 4-wire SPI 0 0 0 8-bit 68XX Parallel 0 0 1 8-bit 80XX Parallel 0 1 1
I
Power Reset for Controller and Driver 14 RES# I
This pin is reset signal input. When the pin is low, initialization of the chip is executed.
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1.5 Pin Definition (Continued) Pin Number Symbol I/O Chip Select 13 CS# I
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Function
Interface (Continued)
This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low.
Data/Command Control
This pin is Data/Command control pin. When the pin is pulled high, the input at D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0 will be transferred to the command register. For detail relationship to MCU interface signals, please refer to the Timing Characteristics Diagrams. When the pin is pulled high and serial interface mode is selected, the data at SDIN is treated as data. When it is pulled low, the data at SDIN will be transferred to the command register. In I2C mode, this pin acts as SA0 for slave address selection.
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D/C#
I
Read/Write Enable or Read
This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low.
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E/RD#
I
Read/Write Select or Write
This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to "High" for read mode and pull it to "Low" for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low.
16
R/W#
I
Host Data Input/Output Bus 18~25 D0~D7 I/O
These pins are 8-bit bi-directional data bus to be connected to the microprocessor's data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. When I2C mode is selected, D2 & D1 should be tired together and serve as SDAout & SDAin in application and D0 is the serial clock input SCL.
Reserve Reserved Pin 7 N.C. The N.C. pins between function pins are reserved for compatible and flexible design.
Reserved Pin (Supporting Pin) 1, 30 N.C. (GND) The supporting pins can reduce the influences from stresses on the function pins. These pins must be connected to external ground.
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1.6 Block Diagram 1.6.1 VCC Supplied Externally
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Active Area 0.96" 128 x 64 Pixels
Segment 127
Common 63
Common 32
~
~~~
Segment 0
~
SSD1306
C2P C2N C1P C1N VBAT VSS VDD BS0 BS1 BS2 CS# RES# D/C# R/W# E/RD# IREF VCOMH VCC D0 ~ D7 VLSS C5 C1 C2 R1 C3 C4
MCU Interface Selection: BS0, BS1 and BS2 Pins connected to MCU interface: CS#, RES#, D/C#, R/W#, E/RD#, and D0~D7 C1, C3: C2: C4, C5: R1: 0.1F 2.2F 4.7F / 16V, X7R 560k, R1 = (Voltage at IREF - VSS) / IREF
Common 31
Common 0
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1.6.2 VCC Generated by Internal DC/DC Circuit
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Active Area 0.96" 128 x 64 Pixels
Segment 127
Common 63
Common 32
~
~~~
Segment 0
~
SSD1306
VDD BS0 BS1 BS2 CS# RES# D/C# R/W# E/RD# C1N VBAT IREF VCOMH VCC C2N C1P C2P ~ VLSS C3 C4 R1 VSS D0 D7
C6
C5
C2
C1
MCU Interface Selection: BS0, BS1 and BS2 Pins connected to MCU interface: CS#, RES#, D/C#, R/W#, E/RD#, and D0~D7 C1, C2, C5, C6: C3: C4: R1: 1F 2.2F 4.7F / 16V, X7R 390k, R1 = (Voltage at IREF - VSS) / IREF
Common 31
Common 0
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2. Absolute Maximum Ratings
Parameter Supply Voltage for Logic Supply Voltage for Display Supply Voltage for DC/DC Operating Temperature Storage Temperature Symbol VDD VCC VBAT TOP TSTG Min -0.3 0 -0.3 -30 -40 Max 4 11 5 70 80
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Unit V V V C C
Notes 1, 2 1, 2 1, 2 -
Note 1: All the above voltages are on the basis of "VSS = 0V". Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur. Also, for normal operations, it is desirable to use this module under the conditions according to Section 3. "Optics & Electrical Characteristics". If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate.
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3. Optics & Electrical Characteristics
3.1 Optics Characteristics Characteristics Symbol Brightness Lbr (VCC Supplied Externally) Brightness Lbr (VCC Generated by Internal DC/DC) (x) C.I.E. (White) (y) Dark Room Contrast CR View Angle Conditions With Polarizer (Note 3) With Polarizer (Note 4) Without Polarizer Min 100 70
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Typ 120 90
Max Unit cd/m2 cd/m2
0.28 0.32 0.36 0.29 0.33 0.37 - >2000:1 >160 degree
* Optical measurement taken at VDD = 2.8V, VCC = 9V & 7.25V. Software configuration follows Section 4.4 Initialization.
3.2 DC Characteristics Characteristics Supply Voltage for Logic Supply Voltage for Display (Supplied Externally) Supply Voltage for DC/DC Supply Voltage for Display (Generated by Internal DC/DC) High Level Input Low Level Input High Level Output Low Level Output Operating Current for VDD Operating Current for VCC (VCC Supplied Externally) Operating Current for VBAT (VCC Generated by Internal DC/DC) Symbol VDD VCC VBAT VCC VIH VIL VOH VOL IDD ICC IBAT Conditions Note 3
Internal DC/DC Enable
Min 1.65 8.5 3.5 7 0.8xVDD 0
Typ Max Unit 2.8 9 7.25 3.3 9.5 4.2 7.5 VDD 0.2xVDD VDD V V V V V V V
Note 4 -
IOUT = 100A, 3.3MHz 0.9xVDD IOUT = 100A, 3.3MHz 0 Note 5 Note 6 Note 7 Note 8 -
0.1xVDD V 180 300 A 7.3 9.1 mA 12.3 17.3 23.1 1 1 15.4 21.6 28.9 5 5 mA mA mA A A
Sleep Mode Current for VDD IDD, SLEEP Sleep Mode Current for VCC ICC, SLEEP
Note 3 & 4: Brightness (Lbr) and Supply Voltage for Display (VCC) are subject to the change of the panel characteristics and the customer's request. Note 5: VDD = 2.8V, VCC = 9V, 50% Display Area Turn on. Note 6: VDD = 2.8V, VCC = 9V, 100% Display Area Turn on. Note 7: VDD = 2.8V, VCC = 7.25V, 50% Display Area Turn on. Note 8: VDD = 2.8V, VCC = 7.25V, 100% Display Area Turn on.
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* Software configuration follows Section 4.4 Initialization.
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3.3 AC Characteristics 3.3.1 68XX-Series MPU Parallel Interface Timing Characteristics: Symbol Description tcycle tAS tAH tDSW tDHW tDHR tOH tACC PWCSL PWCSH tR tF Clock Cycle Time Address Setup Time Address Hold Time Write Data Setup Time Write Data Hold Time Read Data Hold Time Output Disable Time Access Time Chip Select Low Pulse Width (Read) Chip Select Low Pulse width (Write) Chip Select High Pulse Width (Read) Chip Select High Pulse Width (Write) Rise Time Fall Time Min 300 0 0 40 7 20 120 60 60 60 Max 70 140 40 40 Unit ns ns ns ns ns ns ns ns ns ns ns ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25C)
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Symbol Description tcycle tAS tAH tDSW tDHW tDHR tOH tACC tPWLR tPWLW tPWHR tPWHW tCS tCSH tCSF tR tF Clock Cycle Time Address Setup Time Address Hold Time Write Data Setup Time Write Data Hold Time Read Data Hold Time Output Disable Time Access Time Read Low Time Write Low Time Read High Time Write High Time Chip Select Setup Time Chip Select Hold Time to Read Signal Chip Select Hold Time Rise Time Fall Time
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3.3.2 80XX-Series MPU Parallel Interface Timing Characteristics: Min 300 10 0 40 7 20 120 60 60 60 0 0 20 Max 70 140 40 40 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25C)
( Read Timing )
( Write Timing )
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3.3.3 Serial Interface Timing Characteristics: (4-wire SPI) Symbol Description tcycle tAS tAH tCSS tCSH tDSW tDHW tCLKL tCLKH tR tF Clock Cycle Time Address Setup Time Address Hold Time Chip Select Setup Time Chip Select Hold Time Write Data Setup Time Write Data Hold Time Clock Low Time Clock High Time Rise Time Fall Time
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Min 100 15 15 20 10 15 15 20 20 -
Max 40 40
Unit ns ns ns ns ns ns ns ns ns ns ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25C)
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3.3.4 Serial Interface Timing Characteristics: (3-wire SPI) Symbol Description tcycle tCSS tCSH tDSW tDHW tCLKL tCLKH tR tF Clock Cycle Time Chip Select Setup Time Chip Select Hold Time Write Data Setup Time Write Data Hold Time Clock Low Time Clock High Time Rise Time Fall Time
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Min 100 20 10 15 15 20 20 -
Max 40 40
Unit ns ns ns ns ns ns ns ns ns
* (VDD - VSS = 1.65V to 3.3V, Ta = 25C)
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3.3.5 I2C Interface Timing Characteristics: Symbol Description tcycle tHSTART tHD tSD tSSTART tSSTOP tR tF Clock Cycle Time Start Condition Hold Time Data Hold Time (for "SDAOUT" Pin) Data Hold Time (for "SDAIN" Pin) Data Setup Time Start Condition Setup Time (Only relevant for a repeated Start condition) Stop Condition Setup Time Rise Time for Data and Clock Pin
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Min 2.5 0.6 0 300 100 0.6 0.6
Max 300 300
Unit us us ns ns us us ns ns us
Fall Time for Data and Clock Pin Idle Time before a New Transmission tIDLE can Start * (VDD - VSS = 1.65V to 3.3V, Ta = 25C)
1.3
-
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4. Functional Specification
4.1. Commands Refer to the Technical Manual for the SSD1306
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4.2 Power down and Power up Sequence To protect OEL panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off. It gives the OEL panel enough time to complete the action of charge and discharge before/after the operation. 4.2.1 Power up Sequence: 1. 2. 3. 4. 5. 6. Power up VDD Send Display off command Initialization Clear Screen Power up VCC Delay 100ms (When VCC is stable) 7. Send Display on command 4.2.2 Power down Sequence: 1. Send Display off command 2. Power down VCC 3. Delay 100ms (When VCC is reach 0 and panel is completely discharges) 4. Power down VDD
VDD on VCC on Display on VCC VDD VSS/Ground
Display off VCC off VDD off VCC VDD VSS/Ground
4.3 Reset Circuit When RES# input is low, the chip is initialized with the following status: 1. Display is OFF 2. 128x64 Display Mode 3. Normal segment and display data column and row address mapping (SEG0 mapped to column address 00h and COM0 mapped to row address 00h) 4. Shift register data clear in serial interface 5. Display start line is set at display RAM address 0 6. Column address counter is set at 0 7. Normal scan direction of the COM outputs 8. Contrast control register is set at 7Fh 9. Normal display mode (Equivalent to A4h command)
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4.4 Actual Application Example Command usage and explanation of an actual example
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Set Display Off 0xAE
Set Segment Re-Map 0xA1
Set Entire Display On/Off 0xA4
Set Display Clock Divide Ratio/Oscillator Frequency
0xD5, 0x80
Set COM Output Scan Direction 0xC8
Set Normal/Inverse Display 0xA6
Set Multiplex Ratio 0xA8, 0x3F
Set COM Pins Hardware Configuration 0xDA, 0x12
Clear Screen
Set Display Offset 0xD3, 0x00
* Set Contrast Control 0x81, 0x9F(1) / 0xCF(2)
Set Display On 0xAF
Set Display Start Line 0x40
* Set Pre-Charge Period 0xD9, 0x22(1) / 0xF1(2)
* Set Charge Pump 0x8D, 0x10(1) / 0x14(2)
Set VCOMH Deselect Level 0xDB, 0x40
* Written Value for Parameters (1) VCC Supplied Externally (2) VCC Generated by Internal DC/DC Circuit If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function.
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5. Reliability
5.1 Contents of Reliability Tests Item High Temperature Operation Low Temperature Operation High Temperature Storage Low Temperature Storage Conditions 70C, 240 hrs -30C, 240 hrs 80C, 240 hrs -40C, 240 hrs
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Criteria
The operational functions work.
High Temperature/Humidity Operation 60C, 90% RH, 120 hrs -40C 85C, 24 cycles Thermal Shock 60 mins dwell * The samples used for the above tests do not include polarizer. * No moisture condensation is observed during tests.
5.2 Lifetime End of lifetime is specified as 50% of initial brightness reached. Parameter Storage Life Time Min 20,000 Max Unit hr hr Condition 100 cd/m2, 50% Checkerboard Ta = 25C, 50% RH Notes 6 Operating Life Time 10,000
Note 6: The average operating lifetime at room temperature is estimated by the accelerated operation at high temperature conditions.
5.3 Failure Check Standard After the completion of the described reliability test, the samples were left at room temperature for 2 hrs prior to conducting the failure test at 235C; 5515% RH.
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6. Outgoing Quality Control Specifications
6.1 Environment Required Customer's test & measurement are required to be conducted conditions: Temperature: Humidity: Fluorescent Lamp: Distance between the Panel & Lamp: Distance between the Panel & Eyes of the Inspector: Finger glove (or finger cover) must be worn by the inspector. Inspection table or jig must be anti-electrostatic.
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under the following 23 5C 55 15 %RH 30W 50 cm 30 cm
6.2 Sampling Plan Level II, Normal Inspection, Single Sampling, MIL-STD-105E
6.3 Criteria & Acceptable Quality Level Partition Major Minor AQL 0.65 1.0 Definition Defects in Pattern Check (Display On) Defects in Cosmetic Check (Display Off)
6.3.1 Cosmetic Check (Display Off) in Non-Active Area Check Item Classification Criteria X > 6 mm (Along with Edge) Y > 1 mm (Perpendicular to edge)
X
Panel General Chipping
Minor
Y
X
Y
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Check Item Classification
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6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued) Criteria Any crack is not allowable.
Panel Crack
Minor
Cupper Exposed (Even Pin or Film)
Minor
Not Allowable by Naked Eye Inspection
Film or Trace Damage
Minor
Not Allowable
Terminal Lead Twist
Minor
Not Allowable
Terminal Lead Broken
Minor
Terminal Lead Prober Mark
Acceptable
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Check Item Classification
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6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued) Criteria NG if any bent lead cause lead shorting.
Minor
Terminal Lead Bent (Not Twist or Broken)
NG for horizontally bent lead more than 50% of its width.
Minor
Glue or Contamination on Pin (Couldn't Be Removed by Alcohol) Ink Marking on Back Side of panel (Exclude on Film)
Minor
Acceptable
Ignore for Any
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6.3.2 Cosmetic Check (Display Off) in Active Area Check Item Classification Any Dirt & Scratch on Acceptable Polarizer's Protective Film Scratches, Fiber, Line-Shape Defect Minor (On Polarizer) Dirt, Black Spot, Foreign Material, Minor (On Polarizer)
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Criteria Ignore for not Affect the Polarizer W 0.1 Ignore W > 0.1, L 2 n1 L>2 n=0 0.1 Ignore 0.1 < 0.25 n1 0.25 < n=0 0.5 Ignore if no Influence on Display 0.5 < n=0
Dent, Bubbles, White spot (Any Transparent Spot on Polarizer)
Minor
Fingerprint, Flow Mark Minor Not Allowable (On Polarizer) * Protective film should not be tear off when cosmetic check. ** Definition of W & L & (Unit: mm): = (a + b) / 2
L
b: Minor Axis W a: Major Axis
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6.3.3 Pattern Check (Display On) in Active Area Check Item Classification
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Criteria
No Display
Major
Flicker
Major
Not Allowable
Missing Line
Major
Pixel Short
Major
Darker Pixel
Major
Wrong Display
Major
Un-uniform
Major
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Univision Technology Inc.
7. Package Specifications
EPE COVER FOAM 351x212x1, ANTISTATIC x 1 Pcs x 1 pcs (Empty)
Doc. www..com No: SAS1-9046-B
16 Pcs Tray Vacuum packing B Module x 15 pcs A Staggered Stacking EPE PROTECTTIVE
Tray 420x285 T=0.8mm
Exsiccator x 2 pcs Brimary Primary Box 4 SET C SET
Wrapped with adhesive tape x 16 pcs B
Vacuum packing bag
EPE PROTECTTIVE 370mm x 280mm x 20mm
CARTON BOX
Label
Primary L450mm x W296 x H110, B wave xC 4Pcs
Univision Technology Inc. Part ID :
Label
Lot ID : Q'ty : QC :
Carton Box L464mm x W313mm x H472mm, AB wave
(Major / Maximum)
Item Holding Trays Total Trays Primary Box (A) (B) (C) 15 16 1~4
Quantity per Primary Box per Primary Box (Including 1 Empty Tray) per Carton (4 as Major / Maximum)
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Univision Technology Inc.
8. Precautions When Using These OEL Display Modules
8.1 Handling Precautions 1) 2) 3)
Doc. www..com No: SAS1-9046-B
4) 5)
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Since the display panel is being made of glass, do not apply mechanical impacts such us dropping from a high position. If the display panel is broken by some accident and the internal organic substance leaks out, be careful not to inhale nor lick the organic substance. If pressure is applied to the display surface or its neighborhood of the OEL display module, the cell structure may be damaged and be careful not to apply pressure to these sections. The polarizer covering the surface of the OEL display module is soft and easily scratched. Please be careful when handling the OEL display module. When the surface of the polarizer of the OEL display module has soil, clean the surface. It takes advantage of by using following adhesion tape. * Scotch Mending Tape No. 810 or an equivalent Never try to breathe upon the soiled surface nor wipe the surface using cloth containing solvent such as ethyl alcohol, since the surface of the polarizer will become cloudy. Also, pay attention that the following liquid and solvent may spoil the polarizer: * Water * Ketone * Aromatic Solvents Hold OEL display module very carefully when placing OEL display module into the system housing. Do not apply excessive stress or pressure to OEL display module. And, do not over bend the film with electrode pattern layouts. These stresses will influence the display performance. Also, secure sufficient rigidity for the outer cases.
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Do not apply stress to the LSI chips and the surrounding molded sections. Do not disassemble nor modify the OEL display module. Do not apply input signals while the logic power is off. Pay sufficient attention to the working environments when handing OEL display modules to prevent occurrence of element breakage accidents by static electricity. * Be sure to make human body grounding when handling OEL display modules. * Be sure to ground tools to use or assembly such as soldering irons. * To suppress generation of static electricity, avoid carrying out assembly work under dry environments. * Protective film is being applied to the surface of the display panel of the OEL display module. Be careful since static electricity may be generated when exfoliating the protective film.
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Univision Technology Inc.
Doc. www..com No: SAS1-9046-B
11) Protection film is being applied to the surface of the display panel and removes the protection film before assembling it. At this time, if the OEL display module has been stored for a long period of time, residue adhesive material of the protection film may remain on the surface of the display panel after removed of the film. In such case, remove the residue material by the method introduced in the above Section 5). 12) If electric current is applied when the OEL display module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful to avoid the above.
8.2 Storage Precautions 1) When storing OEL display modules, put them in static electricity preventive bags avoiding exposure to direct sun light nor to lights of fluorescent lamps, etc. and, also, avoiding high temperature and high humidity environments or low temperature (less than 0C) environments. (We recommend you to store these modules in the packaged state when they were shipped from Univision Technology Inc.) At that time, be careful not to let water drops adhere to the packages or bags nor let dewing occur with them. If electric current is applied when water drops are adhering to the surface of the OEL display module, when the OEL display module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful about the above.
2)
8.3 Designing Precautions 1) The absolute maximum ratings are the ratings which cannot be exceeded for OEL display module, and if these values are exceeded, panel damage may be happen. To prevent occurrence of malfunctioning by noise, pay attention to satisfy the VIL and VIH specifications and, at the same time, to make the signal line cable as short as possible. We recommend you to install excess current preventive unit (fuses, etc.) to the power circuit (VDD). (Recommend value: 0.5A) Pay sufficient attention to avoid occurrence of mutual noise interference with the neighboring devices. As for EMI, take necessary measures on the equipment side basically. When fastening the OEL display module, fasten the external plastic housing section. If power supply to the OEL display module is forcibly shut down by such errors as taking out the main battery while the OEL display panel is in operation, we cannot guarantee the quality of this OEL display module. The electric potential to be connected to the rear face of the IC chip should be as follows: SSD1306 * Connection (contact) to any other potential than the above may lead to rupture of the IC.
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3) 4) 5) 6) 7)
8)
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Univision Technology Inc.
8.4 Precautions when disposing of the OEL display modules 1)
Doc. www..com No: SAS1-9046-B
Request the qualified companies to handle industrial wastes when disposing of the OEL display modules. Or, when burning them, be sure to observe the environmental and hygienic laws and regulations.
8.5 Other Precautions 1) When an OEL display module is operated for a long of time with fixed pattern may remain as an after image or slight contrast deviation may occur. Nonetheless, if the operation is interrupted and left unused for a while, normal state can be restored. Also, there will be no problem in the reliability of the module. To protect OEL display modules from performance drops by static electricity rapture, etc., do not touch the following sections whenever possible while handling the OEL display modules. * Pins and electrodes * Pattern layouts such as the FPC With this OEL display module, the OEL driver is being exposed. Generally speaking, semiconductor elements change their characteristics when light is radiated according to the principle of the solar battery. Consequently, if this OEL driver is exposed to light, malfunctioning may occur. * Design the product and installation method so that the OEL driver may be shielded from light in actual usage. * Design the product and installation method so that the OEL driver may be shielded from light during the inspection processes. Although this OEL display module stores the operation state data by the commands and the indication data, when excessive external noise, etc. enters into the module, the internal status may be changed. It therefore is necessary to take appropriate measures to suppress noise generation or to protect from influences of noise on the system design. We recommend you to construct its software to make periodical refreshment of the operation statuses (re-setting of the commands and re-transference of the display data) to cope with catastrophic noise.
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